Samsung chairman highlights chip packaging, visits Japanese unit
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0 Samsung Electronics Executive Chairman Lee Jae-yong, center, examines materials during his visit to Advanced Package Lab in Yokohama, Japan, Sunday. Courtesy of Samsung Electronics
Samsung Electronics Executive Chairman Lee Jae-yong visited the company’s semiconductor advanced packaging technology laboratory in Japan, Sunday, pledging to continue expanding its research workforce there and develop the lab into a global R&D hub for next-generation packaging technologies.
According to Samsung Electronics, Lee visited Advanced Package Lab (APL) in Yokohama and discussed with researchers the latest developments in technologies for advanced packaging materials and processes, as well as ways to strengthen cooperation with Japan’s materials, parts and equipment industries.
Lee stressed the importance of securing advanced packaging technologies, as they are emerging as critical for artificial intelligence (AI) processor chips.
APL was established in 2023 and held its official opening ceremony in September this year. Starting in 2024, Samsung Electronics has been investing 40 billion yen ($254 million) over five years to establish its research infrastructure in Japan and strengthen its competitiveness in advanced packaging technologies.
APL specializes in developing and validating core technologies for materials and processes used in advanced semiconductor packaging, serving as a bridge between Samsung Electronics’ semiconductor design and manufacturing capabilities and Japan’s advanced ecosystem of materials, parts and equipment suppliers.
The laboratory focuses on different research areas from the packaging research unit at Samsung Electronics’ Semiconductor R&D Center in Korea, with the two organizations planning to work closely to create synergy in R&D.
Samsung Electronics Executive Chairman Lee Jae-yong, center, listens to an explanation during his visit to Samsung Electronics’ Advanced Package Lab (APL) in Yokohama, Japan, Sunday. From left are Samsung Electronics Device Solutions R&D Japan Head Hiroichi Kawahira, Lee and APL head Takashi Kariya. Courtesy of Samsung Electronics
Advanced packaging refers to techniques and technologies that integrate multiple chips, such as graphics processing units and high-bandwidth memory, into a single package to boost performance, save space and lower costs.
Samsung Electronics said APL plans to expand its scope of research to cover next-generation processes and materials, including wafer bonding and glass substrates, as well as developing new high-performance packaging architectures for mass-producing energy-efficient, high-performance semiconductors.
The company said it selected Japan as the location for APL because the country is home to many globally competitive semiconductor materials, parts and equipment companies and has a well-established ecosystem connecting industry, academia and research institutions.
“The Japanese government has also designated the semiconductor and AI industries as strategic sectors and is actively pursuing investment and support policies, making Japan an attractive R&D hub for Samsung Electronics to advance semiconductor technologies and expand local partnerships,” the company said.
Samsung Electronics plans to leverage Yokohama’s talent pool and industry-academia-research infrastructure while developing APL into a research collaboration hub connecting Japanese materials and equipment suppliers with Samsung’s semiconductor technology capabilities.
